1. Field of the Invention
The present invention relates to a switching voltage regulator and, more particularly, to a switching voltage regulator with an improved range of input voltage.
2. Description of the Related Art
FIG. 1(a) is a circuit diagram showing a conventional switching voltage regulator 10a. The switching voltage regulator 10a converts an input voltage Vin into an output voltage Vout for being supplied to a load Ld. A high-side switch SH is coupled between the input voltage Vin and a switch node SN while a low-side switch SL is coupled between the switch node SN and a ground potential. As to the example of FIG. 1(a), the high-side switch SH is implemented by a PMOS transistor while the low-side switch SL is implemented by an NMOS transistor. An inductor L is coupled between the switch node SN and an output terminal O. An output capacitor Co is coupled to the output terminal O for filtering the output voltage Vout.
The switching voltage regulator 10a has an oscillating signal generating circuit 11 and a switch control system 15 constituted by a latch 12, a PWM control circuit 13, and a drive circuit 14. The oscillating signal generating circuit 11 generates a pulse oscillating signal PL and a ramp oscillating signal RM, both of which are in synchronization with respect to each other. The rising edge of the pulse oscillating signal PL is corresponding to the peak of the ramp oscillating signal RM while the falling edge of the pulse oscillating signal PL is corresponding to the valley of the ramp oscillating signal RM. The pulse oscillating signal PL is applied to a set terminal S of the latch 12 while the ramp oscillating signal RM is applied to the PWM control circuit 13. When the rising edge of the pulse oscillating signal PL triggers the latch 12 through the set terminal S, the drive signal DR from the output terminal Q of the latch 12 changes into the HIGH level. Through the drive circuit 14, the HIGH level of the drive signal DR turns on the high-side switch SH and turns off the low-side switch SL, such that the switching voltage regulator 10a enters the so-called ON operating phase. During the ON operating phase, the inductor current IL gradually increases.
A voltage feedback signal FV is representative of the output voltage Vout while a current feedback signal FI is representative of the inductor current IL. In response to the voltage feedback signal FV, the current feedback signal FI, and the ramp oscillating signal RM, the PWM control circuit 13 applies a control signal CS to a reset terminal R of the latch 12. Regardless of the current mode or the voltage mode adopted in the PWM control method, the drive signal DR from the output terminal Q of the latch 12 changes into the LOW level when the control signal CS triggers the latch 12 through the reset terminal R. Through the drive circuit 14, the LOW level of the drive signal DR turns off the high-side switch SH and turns on the low-side switch SL, such that the switching voltage regulator 10a enters the so-called OFF operating phase. During the OFF operating phase, the inductor current IL gradually decreases.
More specifically, the switching voltage regulator 10a shown in FIG. 1(a) belongs to the step-down type, i.e., converting a higher input voltage Vin into a lower output voltage Vout. The step-down switching voltage regulator 10a has a duty cycle Da as expressed in the following equation (1a):
                                          D            a                    ≡                                    T              ON                                      (                                                T                  ON                                +                                  T                  OFF                                            )                                      =                              V            out                                V            in                                              (                  1          ⁢          a                )            wherein TON is representative of the time of the ON operating phase each period while TOFF is representative of the time of the OFF operating phase each period. The sum of TON and TOFF equals to the period TS of the pulse oscillating signal PL (or the ramp oscillating signal RM).
As appreciated from equation (1a), TON becomes longer when the input voltage Vin becomes closer to the output voltage Vout. The increase of TON causes TOFF to decrease since the period TS of the pulse oscillating signal PL is a constant. However, when the high-side switch SH is turned off from on and the low-side switch SL is turned on from off, a finite physical time is necessary for the accumulation and depletion of the charges. Therefore, TOFF must be limited to being larger than a predetermined minimum TOFF, min for allowing an appropriate switching operation to be possible. For example, when the minimum TOFF, min is set as 15% of the switching period TS, the duty cycle Da has an upper limit of 0.85. In the case where the input voltage Vin reduces to become lower than (Vout/0.85), the switching voltage regulator 10a fails to provide the regulated output voltage Vout since TOFF has been shortened to reach its minimum TOFF, min. Generally speaking, the conventional switching voltage regulator 10a is unable to provide the regulated output voltage Vout when the input voltage Vin is lower than [TS/(TS−TOFF, min)]*Vout.
FIG. 1(b) is a circuit diagram showing another conventional switching voltage regulator 10b. The switching voltage regulator 10b belongs to a step-up type, i.e., converting the lower input voltage Vin into the higher output voltage Vout. In the step-up switching voltage regulator 10b, the high-side switch SH is coupled between the switch node and the output terminal O while the inductor L is coupled between the input voltage Vin and the switch node SN. Moreover, the ON operating phase is executed through turning off the high-side switch SH and turning on the low-side switch SL, causing the inductor current IL to increase. The OFF operating phase is executed through turning on the high-side switch SH and turning off the low-side switch SL, causing the inductor current IL to decrease. The step-up switching voltage regulator 10b has a duty cycle Db as expressed in the following equation (1b):
                                          D            b                    ≡                                    T              ON                                      (                                                T                  ON                                +                                  T                  OFF                                            )                                      =                              (                                          V                out                            -                              V                in                                      )                                V            out                                              (                  1          ⁢          b                )            
As appreciated from equation (1b), TON becomes shorter when the input voltage Vin becomes closer to the output voltage Vout. However, when the high-side switch SH is turned on from off and the low-side switch SL is turned off from on, a finite physical time is necessary for the accumulation and depletion of the charges. Therefore, TON must be limited to being larger than a predetermined minimum TON, min for allowing an appropriate switching operation to be possible. For example, when the minimum TON, min is set as 15% of the switching period TS, the duty cycle Db has an upper limit of 0.85. In the case where the input voltage Vin rises to become higher than (0.85*Vout), the switching voltage regulator 10b fails to provide the regulated output voltage Vout since TON has been shortened to reach its minimum TON, min. Generally speaking, the conventional switching voltage regulator 10b is unable to provide the regulated output voltage Vout when the input voltage Vin is lower than [(TS−TON, min)/TS]*Vout.